论文标题
带有FPGA加速深度学习的闭环睡眠调制系统
A Closed-loop Sleep Modulation System with FPGA-Accelerated Deep Learning
论文作者
论文摘要
闭环睡眠调制是一种新兴的研究范例,可治疗睡眠障碍并提高睡眠益处。但是,两个主要障碍阻碍了该研究范式的广泛应用。首先,经常需要将受试者连接到架子上,以使数据获取措施,这会对睡眠质量产生负面影响。其次,常规的实时睡眠阶段分类算法的性能有限。在这项工作中,我们通过开发支持设备上闭环操作的睡眠调制系统来征服这两个限制。使用低功率现场可编程栅极阵列(FPGA)设备加速的轻量级深度学习(DL)模型进行睡眠阶段分类。 DL模型使用单个通道脑电图(EEG)作为输入。两个卷积神经网络(CNN)用于捕获一般和详细的特征,双向长期内存(LSTM)网络用于捕获时间变化的序列特征。 8位量化用于降低计算成本而不会损害性能。 DL模型已使用包含81个受试者的公共睡眠数据库进行了验证,该数据库的最新分类精度为85.8%,F1分数为79%。开发的模型还显示了将其推广到不同通道和输入数据长度的潜力。在测试台上已经证明了闭环的听觉刺激。
Closed-loop sleep modulation is an emerging research paradigm to treat sleep disorders and enhance sleep benefits. However, two major barriers hinder the widespread application of this research paradigm. First, subjects often need to be wire-connected to rack-mount instrumentation for data acquisition, which negatively affects sleep quality. Second, conventional real-time sleep stage classification algorithms give limited performance. In this work, we conquer these two limitations by developing a sleep modulation system that supports closed-loop operations on the device. Sleep stage classification is performed using a lightweight deep learning (DL) model accelerated by a low-power field-programmable gate array (FPGA) device. The DL model uses a single channel electroencephalogram (EEG) as input. Two convolutional neural networks (CNNs) are used to capture general and detailed features, and a bidirectional long-short-term memory (LSTM) network is used to capture time-variant sequence features. An 8-bit quantization is used to reduce the computational cost without compromising performance. The DL model has been validated using a public sleep database containing 81 subjects, achieving a state-of-the-art classification accuracy of 85.8% and a F1-score of 79%. The developed model has also shown the potential to be generalized to different channels and input data lengths. Closed-loop in-phase auditory stimulation has been demonstrated on the test bench.