论文标题
评估降低电压边缘对MPSOC的节能操作的影响
Evaluating the effects of reducing voltage margins for energy-efficient operation of MPSoCs
论文作者
论文摘要
对DVFS系统施加了电压边距或护栏，以解释过程，电压和温度可变性效应。虽然有必要确保正确性，但护罩降低了能源效率，这是嵌入式系统的关键要求。文献表明，错误检测技术可用于在降低或消除后卫带时保持系统的可靠性。这封信评估了商业RISC-V MPSOC的实际利润率，同时违反了其护罩限制。这项工作的主要动机是支持开发有效的系统，该系统利用多核心体系结构的冗余，用于误差检测和校正方案，能够减轻降低侵略性电压降低引起的误差。为了获得同等的表现，我们在违反制造商定义的后卫带来的同时，达到了高达27％的能源，为进一步的发展留下了合理的能量利润。
Voltage margins, or guardbands, are imposed on DVFS systems to account for process, voltage, and temperature variability effects. While necessary to assure correctness, guardbands reduce energy efficiency, a crucial requirement for embedded systems. The literature shows that error detection techniques can be used to maintain the system's reliability while reducing or eliminating the guardbands. This letter assesses the practically available margins of a commercial RISC-V MPSoC while violating its guardband limits. The primary motivation of this work is to support the development of an efficient system leveraging the redundancy of multicore architectures for an error detection and correction scheme capable of mitigating the errors caused by aggressive voltage margin reduction. For an equivalent performance, we achieved up to 27% energy reduction while violating the manufacturer's defined guardband, leaving reasonable energy margins for further development.
