论文标题

一个6.3纳米通道的96通道神经峰值处理器,用于动作直接编码的脑部计算机接口植入物

A 6.3-Nanowatt-per-Channel 96-Channel Neural Spike Processor for a Movement-Intention-Decoding Brain-Computer-Interface Implant

论文作者

Jiang, Zhewei, Li, Jiangyi, Chundi, Pavan K., Kim, Sung Justin, Yang, Minhao, Kang, Joonseong, Jung, Seungchul, Kim, Sang Joon, Seok, Mingoo

论文摘要

本文介绍了用于部署阶段实时上限运动意图解码的Microwatt端到端神经信号处理硬件。该模块具有96通道假体植入物的细胞间尖峰检测,排序和解码操作。我们为这些操作设计算法,以达到最小的计算复杂性,同时匹配或提高最先进的脑部计算机接口分类和运动解码的准确性。基于这些算法,我们设计了神经信号处理硬件的架构师,重点是硬件重用和事件驱动的操作。该设计达到了最高级别的集成水平,将无线数据速率降低了四个以上的数量级。芯片原型在180 nm高空中,达到96个通道的0.61 UW的最低功率耗散,即使在运动状态估计计算的整合,也以可比/更好的精度低21倍。

This paper presents microwatt end-to-end neural signal processing hardware for deployment-stage real-time upper-limb movement intent decoding. This module features intercellular spike detection, sorting, and decoding operations for a 96-channel prosthetic implant. We design the algorithms for those operations to achieve minimal computation complexity while matching or advancing the accuracy of state-of-art Brain-Computer-Interface sorting and movement decoding. Based on those algorithms, we devise the architect of the neural signal processing hardware with the focus on hardware reuse and event-driven operation. The design achieves among the highest levels of integration, reducing wireless data rate by more than four orders of magnitude. The chip prototype in a 180-nm high-VTH, achieving the lowest power dissipation of 0.61 uW for 96 channels, 21X lower than the prior art at a comparable/better accuracy even with integration of kinematic state estimation computation.

扫码加入交流群

加入微信交流群

微信交流群二维码

扫码加入学术交流群,获取更多资源