论文标题
戴夫：自动从英语中得出
DAVE: Deriving Automatically Verilog from English
论文作者
论文摘要
尽管自然语言提供了数字系统的规格，但工程师会竭尽全力将其转化为编译器对数字系统理解的编程语言。自动化此过程使设计师可以使用最舒适的语言（原始的自然语言），并专注于其他下游设计挑战。我们探讨了最先进的机器学习（ML）通过通过微调GPT-2（一种自然语言ML系统）自动从英语中得出Verilog摘要。我们描述了我们生产新手级数字设计任务数据集的方法，并对GPT-2进行了详细的探索，从而在我们的任务集中找到了令人鼓舞的翻译性能（正确的94.8％），并且能够处理简单和抽象的设计任务。
While specifications for digital systems are provided in natural language, engineers undertake significant efforts to translate them into the programming languages understood by compilers for digital systems. Automating this process allows designers to work with the language in which they are most comfortable --the original natural language -- and focus instead on other downstream design challenges. We explore the use of state-of-the-art machine learning (ML) to automatically derive Verilog snippets from English via fine-tuning GPT-2, a natural language ML system. We describe our approach for producing a suitable dataset of novice-level digital design tasks and provide a detailed exploration of GPT-2, finding encouraging translation performance across our task sets (94.8% correct), with the ability to handle both simple and abstract design tasks.
